This invention concerns a system for the selective display of RAM data in a case where digital data such as from a personal computer are displayed on a monitor screen, as well as to a data selection circuit therefor. More specifically, it relates to a RAM data selection circuit which is required for outputting both of the contents in a graphic display RAM storing the data of the screen by the dot unit and a text display RAM storing the dots of the screen by the block unit and superimposing them on a monitor screen.
FIG. 1 is a basic conceptional view for the display of data from a personal computer as the background of this invention, wherein there are shown a personal computer 1 incorporating a microcomputer, a keyboard 2 providing the personal computer 1 with input information and a color television monitor 3 having a television circuit 3a and raster-scan type CRT 3b driven from the television circuit 3a. When R.G.B signals are applied together with a sync signal (CY) from the personal computer 1 to the color television monitor 3, data can be displayed by way of a matrix circuit 3aa in the television circuit 3a on the CRT 3b. The color television monitor 3 may be a recently commercialized color television receiver for home use having an RGB terminal as well as an exclusive monitor. The data displayed on the monitor screen are those data stored in RAMs incorporated in the personal computer 1.
In the case of displaying dot data on the monitor screen, dots for the screen may be processed dot by dot individually, or several dots may be processed collectively in a unit of one block. In the case of dot by dot processing, if one bit of the data is allocated to one dot, a memory capacity for the number of bits corresponding to the dots is required. For instance, in the case of a 640.times.200 dot screen, memory capacity of 128,000 bits is required. When all of the dots of the screen are allocated to the bits of the memory, this memory is called a graphic RAM. Conversely, in a case where several dots are processed in one block, a code corresponding to the block is composed of several bits of data (for instance, 8 bits) and the code data is stored in the memory. This memory is referred to as a text RAM. In this case, the memory capacity can be reduced as compared with the former graphic RAM. For instance, in a case where an 8 dot.times.8 dot block is replaced with a code data composed of 8 bits, the number of 64 bits required in the former can be reduced to 8 bits in the latter. In the same way, 2000 bits of capacity is sufficient for the case of 640.times.200 dots. The disadvantage in the latter system is that it requires a character generator and a parallel-serial converter, and in that it can not perform fine control on every dot.
In a case where the personal computer 1 (FIG. 1) has both the text display RAM and the graphic display RAM, the data from these RAMs are simultaneously outputted by transferring the content in the text display RAM once into the graphic display RAM and, thereafter, reading them out of the graphic display RAM to the screen. The conventional system involves a problem that a considerable period of time is required for the transfer of the text data and high speed output to the screen is impossible. Furthermore, since the text data are once loaded into the graphic RAM, it lacks in a sufficient degree of freedom on superimposing both of the data as viewed from the screen thereby necessarily providing only a monotonous screen display.